Alright broke out the measurement taping and found out some things about Navi and the Anaconda in terms of sizes on 7nm.
GDDR6 phy controller: 4.5mm x 8
Dual CU: 3.37mm x 20
4 ROP cluster: .55mm x 16
L1+L2+ACE+Gemotry processor+empty buffer spaces + etc: 139mm
A rougher estimate using the 12x14mm GDDR6 chips next to the SOC.
370 mm-390 mm.
It's a bit bigger than the 1X SOC for sure.
If we use the figure of 380mm,
75mm for CPU
45mm for 10 GDDR6 controllers
8.8mm for ROPs
140mm for buses, caches, ACE, geometry processors, shape etc. I might be over estimating this part as the 5700 seems to have lots of "empty" areas.
We have ~110mm left for CUs + RT hardware. There is enough there for ~30 dual CUs and RT extensions.
The Anaconda SOC is around the minimum size you need to fit the maximum Navi GPU and Zen2 cores.
I expect Anaconda to have a minimum of 48 CUs if the secret sauce is extra heavy or 60CUs if the sauce is light.
370 mm2 to 390 mm2 estimated.
60 CU would be crazy.
Anything above 48 CU’s would be gravy.
Im hoping for at least 52 CU if the “sauce is light”
If AMD/MS didn't increase Shader Engine count in relation to Compute unit and memory controller count increase, it will run into the same bottleneck problem as Vega II.
NVIDIA's 6 GPC units design at 11 to 17 TFLOPS compute shader range is not a paper weight.
NVIDIA's GPC ~= AMD's Shader Engine (SE) terminology.